Electronic Systems Group (GSE)
Publications in journals
- Villacorta, H.; Champac, V.; Bota, S.; Segura, J, "Resistive bridge defect detection enhancement under parameter variations combining Low VDD and body bias in a delay based test", "Microelectronics Reliability", Volume 52, Issue 11, Pages 2799-2804, 2012. Paper.
- Merino, J.L.; Bota, S.A.; Picos, R.; Segura, J, "Alternate characterization technique for static random?access memory static noise margin determination", "International Journal of Circuit Theory and Applications", Volume 41, Issue 10, Pages 1085-1096, 2012. Paper.
- Champac V.; Hernandez, J.V.; Barcelo, S.; Gomez, R.; Hawkins, C.; Segura, J., "Testing of Stuck-Open Faults in Nanometer Technologies", "IEEE Design & Test of Computers", Volume 29, Issue 4, Pages 80-91, 2012. Paper.
- Gili, X.; Barcelo, S.; Bota, S. A.; Segura, J., "Analytical Modeling of Single Event Transients Propagation in Combinational Logic Gates", "IEEE Transactions on Nuclear Science", Volume 59, Issue 4, Pages 971-979, 2012. Paper.