Electronic Systems Group (GSE)
Patent rights
- 6825687B2- A. Keshavarzi, J. Segura, S. Narendra, V. De. "Selective colling of integrated and circuits for minimizing power loss", United States. INTEL CORPORATION, 2004. Patent.
- 6794630B2- A. Keshavarzi, J. Segura, V. De. "Method and apparatus for adjusting the threshold of a CMOS radiation-measuring circuit", United States. INTEL CORPORATION, 2004. Patent.