Electronic Systems Group (GSE)

Meetings participation

  • Barceló, S.; Gili, X.; Bota, S.; Segura, J.. , "An efficient and scalable STA tool with direct path estimation and exhaustive sensitization vector exploration for optimal delay computation". "Conference on Design, Automation & Test in Europe (DATE'11)", Grenoble, France, 2011. Paper presentation.
  • Gili, X.; Barceló, S.; Bota, S.A.; Segura, J.. , "Analytical modeling of glitch propagation in nanometer ICs". "SPIE Microtechnologies - VLSI Circuits and Systems Conference (SPIE 2011)", Praga, Czech Republic, 2011. Paper presentation.
  • Villacorta, H.; Champac, V.H.; Bota, S.A.; Segura, J.. , "Resistive Bridge Defect Detectability Considering Process Variation and Technology Scaling". "12th IEEE International Latin American Test Workshop", Porto de Galinhas, Brazil, 2011. Paper presentation.
  • Alorda, B.; Torrens, G.; Bota, S.; Segura, J.. , "Optimization of embedded 8T SRAMS usign Word-line voltage modulation". "Design, Automation & Test in Europe (DATE'11)", Grenoble, France, 2011. Publication data: Proceedings of the 2011 Design, Automation & Test in Europe. ISBN: 978-3-9810801-7-9. Paper presentation.
  • Bota, S.A.; Alorda, B.; Torrens, G.; Segura, J.. , "Pass-Transistors pMOS based 8T SRAM cell for layout compaction". "Spanish Conference on Electron Devices (CDE'11)", Palma de Mallorca, Spain, 2011. Publication data: Digital Object Identifier: 10.1109/SCED.2011.5744184. Poster.
  • Sansa, M.; Verd, J.; Uranga, A.; Perez-Murano, F.; Segura, J. and Barniol, N.. , "Ultrasensitive humidity sensor based on a metal CMOS-MEMS oscillator". "8th International Workshop on Nanomechanical Sensing, Dublin", Dublin, Ireland, 2011. Publication data: Conference abstracts. Poster.